In the semiconductor fabrication process, it is frequently required to make local interconnect between a gate polysilicon layer to N+ and P+ diffusion regions. In the conventional art, this can be accomplished by using buried contacts to provide the necessary electrical connections. A buried contact is formed by the physical contact of a polysilicon layer which is substantially polycrystalline silicon to a region doped by impurity ions in a semiconductor substrate. Buried contacts are most commonly used in a CMOS type of memory circuits.
An enlarged top view and cross-sectional view of a conventional buried contact is shown in FIGS. 1A and 1B, respectively. In a typical fabrication process for buried contacts, a gate oxide layer (not shown) is first deposited on the surface of a silicon substrate 12. On top of the gate oxide layer, a thin layer of polysilicon (not shown) is then deposited to protect the gate oxide layer from contamination. The gate oxide layer and the polysilicon layer are then patterned by a photoresist masking process and etched. Openings (not shown) are formed on the surface of substrate 12 to expose sections of the substrate for the formation of buried contacts. An ion implantation process is performed at the openings to increase the surface dopant concentration for improved contact resistance. Subsequently, the photoresist layer is removed and a layer of polysilicon is deposited onto substrate 12. Thereafter, the polysilicon layer is patterned and etched, typically by a reactive ion etching method, to form a gate electrode 14 for making electrical connection with the diffusion region 16. Metal silicides may be used to reduce the resistivity of the polysilicon interconnect. The metal silicides offer the advantage of lower resistivity while retaining silicon gate characteristics. A BPSG planarization step completes the buried contact fabrication process.
Electrical connection to the other diffusion region 18 can be made by metal contact 22 by first performing a contact masking and etching process. After the formation of the contact holes 24, a thin layer of titanium tungsten or titanium nitride is normally deposited into the contact hole to improve adhesion. A refractory metal plug such as a tungsten plug is then deposited into hole 24. After a tungsten plug etch back process, a metal I layer 26 is deposited to provide connection to other devices.
In order to make a local interconnect from a gate polysilicon to both N+ and P+ diffusion regions by using a conventional buried contact, a complex set of processing steps must be added. This is because that gate polysilicon requires to be doped to both P+ and N+ depending on the diffusion doping the polysilicon is strapping to. Furthermore, in order to minimize inter-diffusion between N+ and P+ doping in polysilicon, additional processing steps are required to lower the diffusivity. This becomes more difficult as design rules are scaled down to the sub-micron range.
There are still other disadvantages of using a buried contact process. For instance, to avoid dopant penetration into the channel region, a P+ doped polysilicon needs to be implanted with the very low energy B11 instead of BF2 to avoid F+ enhanced dopant diffusion. This results in poor manufacturability. For a tungsten polycide process, the buried contact method does not allow an in-situ deposited and doped polysilicon/tungsten silicide structure. The buried contact method also makes it difficult to match the P+ doped and the N+ doped polycide sheet resistance in the case of a titanium silicide process.
Other workers in the field of local interconnects have proposed methods to overcome the drawbacks and disadvantages of the conventional buried contact process. One of such methods is to use a metallic local interconnect strap to shunt from a gate polysilicon to a diffusion region. A typical process is shown in FIGS. 2A and 2B where an enlarged top view and cross-sectional view is shown, respectively. In a local interconnect strap method, a polysilicon gate 32 is first formed without direct contact with the diffusion regions 34 and 36 in a silicon substrate 40. An insulating layer 42 of dielectric material is then deposited on top of the polysilicon and the diffusion regions. Vias are opened through masking/etching processes in the insulator layer 42. After the deposition of a glue layer (not shown), metal plugs 44, 46 and 48 are deposited into the vias. After a tungsten plug etch back and a local interconnect masking/etching process, a local interconnect shunt layer 50 is deposited. A separate shunt 52 is also deposited on metal plug 48 to allow the deposition of another metal plug 54 such that diffusion region 36 can be connected to the Metal I layer 56. The second metal plug 54 is formed in a via opened in the second insulating layer 60 of a dielectric material.
The local interconnect strap method, even though accomplishes the electrical connection between a polysilicon gate and a diffusion region, is a process-intensive method. For instance, it requires the additional processing steps of depositing an insulating layer between the local interconnect and the gate polysilicon, of opening vias in an insulating layer, of patterning and depositing the local interconnect layer. Moreover, from a topological standpoint, the process requires much larger layout area than a buried contact at the intersection of the gate polysilicon to the diffusion region.
It is therefore an object of the present invention to provide a local interconnect between a polysilicon gate and a diffusion region that does not have the drawbacks and shortcomings of the prior art interconnect.
It is another object of the present invention to provide a metal plug local interconnect for connecting a polysilicon gate to a diffusion region.
It is a further object of the present invention to provide a metal plug interconnect between a polysilicon gate and a diffusion region that only requires a minimal number of additional processing steps.
It is still another object of the present invention to provide a metal plug local interconnect that does not require the formation of a buried contacts.
It is yet another object of the present invention to provide a metal plug local interconnect between a polysilicon gate and a diffusion region that does not require the use of a local interconnect strap.
It is another further object of the present invention to provide a metal plug local interconnect between a polysilicon gate and a diffusion region wherein the metal plug local shunt can be formed in a single metal contact formation step.